It is necessary to achieve a high state of reliability in many vital components of modern communication systems, e.g., electronic telephone switching systems. One vital component of any communication system is a system clock circuit. High reliability is often achieved in these circuits via the utilization of duplicated circuitry, allowing continued operation in the presence of a component failure and during the time necessary to repair such a failure.
Several schemes exist within the prior art which utilize the concept of duplicated system clock circuitry. However, each of these schemes suffers from limitations not found in the present invention. One prior art disclosure is U.S. Pat. No. 3,965,432, J. Denenberg et al., involving the use of two clock pulse generators, each of which normally provides alternate output signals of the clock circuit. In the presence of a failure of one of the pulse generators, all subsequent output pulses are produced by that pulse generator which has not failed. However, at the time of failure, an output pulse may be stretched or delayed with this arrangement. A further limitation of this arrangement is that the circuitry cannot withstand a substantial phase shift differential between the output signals of the two clock pulse generators. Such a differential produces irregular output pulses. A further prior art disclosure is U.S. Pat. No. 4,025,874, D. L. Abbey, involving a standby clock circuit being switched into operation upon the failure of an on-line clock circuit. However, the circuitry found in this prior art may produce the loss of several clock output pulses and further result in extensive system disruption if a phase shift differential occurs between the output signals of the clock pulse generators.